SystemC-Based Design Methodology for Real-Time Embedded Systems

The fast growing complexity and short time to market of today's real-time embedded systems necessitates new design methods and tools to face the problem of specification, design, analysis, scheduling, simulation, integration and validation of complex systems. In the project, a system level method for embedded real-time systems design is developed exploiting SystemC strength for system level dan co-design modeling. In order to support the methodology, some extentions to SystemC are proposed starting form RTOS modeling and framework for scheduling simulation.

RTOS Modeling on SystemC

Generic RTOS Services Standard Channels for Various MOC's Kahn Process Networks, Static Data Flow, etc. Methodology Specific Channels Master Salve Library, etc. Elementary Channels Signel, Timer, Mutex, Semaphore, Fifo Core Language Modules, Ports & Channels, Processes, Interfaces, Events Data Types Logic Type (01XZ), Logic Vectors, Bits & Bit Vektors Arbitrary Precision Integers, Fixed Point Integers C++ Language Standard

The language support for higher level of abstraction and more realistic modeling using SystemC is advocated. In the project the modeling capability of SystemC is extended by generic real-time operating system services aimed to providemore realistic software modeling features. more...

An Open Framework for Scheduling Assessment

The rate and reactivity figures of embedded systems are distinctly influenced by the chosen scheduling policy. In the project an open framework for real-time scheduling simulation is developed by exploiting the SystemC modeling style aimed to support the integration of both scheduling policy and functional validation into one system model simulation. more...

Real-Time Scheduling Assessment on SystemC Model