System-Level Design of Embedded Systems

Due to the growing complexity of embedded systems new design methodologies and concepts are mandatory. First of all, the design process must be shifted towards higher levels of abstraction. Therefore a focus of research in the "Integrated Systems and Circuits Lab" is set upon a system-level design methodology of embedded systems. Thus an efficient computational model for specification and analysis of embedded system denoted as hierarchical CoDesign Model is developed at this institute. This model is especially suited to support codesign tasks for data-flow dominated hardware-/software systems and has been tested successfully on practical problems regarding image processing, robotics, and data communication. Specific problems regarding systems specifications lie in the necessity for the notation of concurrent functionality on the one hand and the comprehensive specification of internal communication on the other hand without, however, prematurely codifying solution architectures in this early phase of system conception. Based on the hierarchical model system-level synthesis algorithm are developed considering the multi-objective characteristics of embedded systems. In a last step SystemC, as one of the increasingly used system-level description languages based on C++, is exploited for an early validation of these first design decisions (allocation, scheduling, and binding).