Introducing Dynamic to Hardware Development

Wouldn't it be nice to have a computing machine that fits exactly to the algorithm one is executing? By now, multi-purpose processors are used to do any job. If they don't fit exactly to the problem a software or hardware adaption is used to customize it. Another way to get appropriate hardware for a given problem is to design a chip that does what is needed. Unfortunately, both ways are time consuming, expensive and inflexible because the architcture is fixed in all cases.

Todays Field-Programmable-Gate-Arrays (FPGA) are reconfigurable at runtime. Leading to the idea of an reprogrammable processor. But what if we leave out the von Neumann principle of computation or at least the well known CPU? At this point our work comes into play. We shift the focus from CPU centric systems to Configurable Processing Units.

Our scope is on hardware and on design. Currently, hardware design is to be enriched by methodologies from the software development area. Applying these concepts to hardware dynamic is prerequisite. Hence, it is not just hardware we are dealing with. Moreover, software descriptions languages and their concepts are subject to our research in this area.

Aspects

• Higher levels of abstraction.
• New abstraction hierarchy.
• Algorithmic description.
• Adding dynamic to hardware.
• Paving the way to apply software methodologies.
• Reconfiguration management
• Concept for generic components
• System description.
• From algorithm to FSMs
• Algebras supporting state-based systems.

We use Xilinx FPGAs as prototype plattform. Our choice is based on its partial reconfiguration capabilities and its CLB architecture. Furthermore, these hardware features are encouraged by the Xilinx Modular Design-Flow.

OS integration

Field Programmable Gate Arrays (FPGA) are becoming more and more common in high speed computing while the number of available logic blocks increases steadily. Modern FPGAs can be used for multiple purposes at a time and using them for only one task a time seems more and more as waste of potential computing power.

There are however obstacles in the way using the fpga as a more natural computing resource:

• Mapping of process to and from fpga's is not possible due a missing mapping between processes on a cpu and a fpga.
• The resources of the fpga can currently not be maintained in satisfing manner
• There is no common interface definition for processes mapped to an fpga

These obstacles are the reason for the rearch project which is currently in the state of creating an sample application to pinpoint the problems in an apropiate manner.

The research project is aiming to extend the Linux kernel with functionality needed for FPGA operation. The Linux kernel is used because its source freely available and it is in active development.