Research Interests

• Computational Models for FPGAs
• Mechanisms for dynamic reconfiguration

Publications

Workshops and Conferences

• Felix Madlener, H. Gregor Molter, and Sorin A. Huss
  SC-DEVS: An efficient SystemC Extension for the DEVS Model of Computation
  DATE'09, Design Automation and Test in Europe, to be published
• Felix Madlener and Sorin A. Huss
  Domain-specific Design Space Exploration and Variant Selection Methods for High-Performance Cryptographic Engines
  Int. Conference on Circuits and Systems (CS2008), August 2008
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• Maxim Anikeev, Felix Madlener, Andreas Schlosser, Sorin A. Huss, and Christoph Walther
  Automated Verification for an Efficient Elliptic-Curve Algorithm - A Case Study
  Information Security: Proceedings of the IX. International Conference, January 2007
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• Andreas Kühn, Felix Madlener, and Sorin A. Huss
  Resource Management for Dynamic Reconfigurable Hardware Structures
  2nd International Workshop on Reconfigurable Communication Centric System-on-Chips, July 2006
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• Sorin A. Huss, Michael Jung, and Felix Madlener
  High Speed Elliptic Curve Crypto Processors: Design Space Exploration by Means of Reconfigurable Hardware
  Proceedings of the 6th International Scientific and Applied Conference - Information Security, July 2004
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• Markus Ernst, Michael Jung, Felix Madlener, Sorin A. Huss, and R. Blümel
  A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over GF(2^n)
  Workshop on Cryptographic Hardware and Embedded Systems, August 2002
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• Michael Jung, Felix Madlener, Markus Ernst, and Sorin A. Huss
  A Reconfigurable Coprocessor for Finite Field Multiplication in GF(2^n)
  Proceedings of the IEEE Workshop on Heterogeneous reconfigurable Systems on Chip, April 2002
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Studienarbeit

• Felix Madlener
  FPGA based Hardware Accleration for Elliptic Curve Cryptography based on GF(2^n)
  German Abstract

Diploma Thesis

• Felix Madlener
  Entwicklung eines Gargbage-Collectors für rekonfigurierbare Hardwarestrukturen (rev 1)
  German Presentation
  

Student Thesis

Open

Ongoing

• Felix Heinrichs
  Entwurf einer Java-basierten GUI zur Erstellung von Datenflussgraphen
  Bachelorarbeit
  
• Yifei He
  Entwurf und Implementierung eines Schedulingalgorithmus für rekonfiguriere Architekturen
  Masterarbeit
  
• Julia Weingart
  Verifikation von DEVS Modellen für rekonfigurierbare Systeme
  Diplomarbeit
  
• Dennis Kusidlo
  Implementierung und Test eines dynamisch rekonfigurierbaren Systems
  Semesterarbeit
  
• Boris Dreyer
  Entwurf eines Low Resource ECC-Prozessors
  Bachelorarbeit
  

Finished

• Christian Nono
  Entwurf und Implementierung eines genetischen Schedulingalgorithmus für rekonfiguriere Architekturen
  Diplomarbeit, Juni 2008
  
• Martin Geisse
  Integration of Domain-Specific Languages
  Diplomarbeit, April 2008
  
• Stefan Mehrens
  Konzeption und Evaluierung unterschiedlicher Controller-Architekturen für EC Kryptoprozessoren
  Studienarbeit, Dezember 2006
  
• Hagen Stübing
  Development of a VHDL Generator for Scheduled Data Flow Graphs
  Studienarbeit, Spanish Master Thesis, Dezember 2006