Projects

• ITEA EAST-EEA
  This project received the ITEA Achievement Award 2004.

Research Topics

• Dynamic Reconfigurable Computing
• Behavioral Description using high-level languages
• High-level Synthesis

Publications

• Andreas Kühn, Felix Madlener, Sorin A. Huss
  Resource Management for Dynamic Reconfigurable Hardware Structures
  2^nd International Workshop on Reconfigurable Communication Centric System-on-Chips (ReCoSoC'06), Montpellier, France, July 3-5, 2006.
• A. Kühn, S. Huss;
  Dynamically Reconfigurable Hardware for Object Oriented Processing
  International Conference on Parallel Computing in Electrical Engineering, Dresden, Germany, September 2004
• A. Kühn, M. Goedecke, S. Huss:
  Effiziente Ausführung von parallelen Simulations- und Charakterisierungsabläufen mittels einer interaktiven Benutzungsoberfläche.
  4. GMM/ITG-Diskussionssitzung Analog '96, S. 395-402, Berlin, Oktober 1996.

Thesis

Open

• Development and implementation of Actor-Nodes, based on embedded systems

Ongoing

• Marek Jan Renczmin
  Development and implementation of an skalable Message-Passing communication system for an heterogenous FPGA-Cluster
  (diploma thesis)

Finished

• Marek Jan Renczmin
  Development and Realization of a Scalable Message-Passing Communication System for a Heterogeneous FPGA Cluster
  (diploma thesis)
• H. Gregor Molter
  Development of an Dispatchers vor partially reconfigurable FPGAs
  (student research project)
• Daniel Nuß
  VHDL based logic design - ASIC logic verification using programmable devices
  (diploma thesis)
• Andreas Berndt
  Implementing an Java to VHDL Converter.
  (diploma thesis)
• Felix Madlener
  A garbage-collector for reconfigurable hardware structures.
  (diploma thesis)
• Christoph Reeg und Andreas Sommerfeld
  Asteroids - Implementation of an vector display processor, based on reconfigurable hardware.
  (student research project)